1. Field of the Invention
The present invention relates to semiconductor packages and fabrication methods thereof, and more particularly, to a semiconductor package having an interposer and a fabrication method thereof.
2. Description of Related Art
Flip-chip technologies facilitate to reduce chip packaging sizes and shorten signal transmission paths and therefore have been widely used for chip packaging. Various types of packages such as chip scale packages (CSPs), direct chip attached (DCA) packages and multi-chip module (MCM) packages can be achieved through flip-chip technologies.
In a flip-chip packaging process, a big CTE (Coefficient of Thermal Expansion) mismatch between a chip and a packaging substrate adversely affects the formation of joints between conductive bumps of the chip and contacts of the packaging substrate, thus easily resulting in delamination of the conductive bumps from the packaging substrate. On the other hand, along with increased integration of integrated circuits, a CTE mismatch between a chip and a packaging substrate induces more thermal stresses and leads to more serious warpage, thereby reducing the product reliability and resulting in failure of a reliability test.
Accordingly, semiconductor interposers have been developed to overcome the above-described drawbacks. FIG. 1 shows a semiconductor package 1 with a silicon interposer 11 provided between a packaging substrate 10 and a semiconductor chip 15. Since the interposer 11 and the semiconductor chip 15 are made of similar materials, the problem of CTE mismatch is overcome.
To form the semiconductor package 1, a wafer is provided with a plurality of TSVs 110 formed therein. A redistribution layer 111 is formed on one side of the wafer and a plurality of conductive bumps 12 are formed on the opposite side of the wafer. Subsequently, the wafer is singulated into a plurality of silicon interposers 11. Each of the silicon interposers 11 is disposed on a packaging substrate 10 through the conductive bumps 12 and an underfill 14 is filled between the silicon interposer 11 and the packaging substrate 10 for encapsulating the conductive bumps 12. Thereafter, a semiconductor chip 15 is disposed on and electrically connected to the redistribution layer 111 through a plurality of solder bumps 150 and an underfill 16 is filled between the silicon interposer 11 and the semiconductor chip 15 for encapsulating the solder bumps 150. Finally, a plurality of solder balls 13 are formed on a bottom side of the packaging substrate 10 for disposing a circuit board.
In the above-described semiconductor package 1, the silicon interposer 11 has a small thickness. When a reflow process is performed to the conductive bumps 12 or the solder bumps 150 so as for the silicon interposer 11 to bond with the packaging substrate 10 or the semiconductor chip 15, warpage can easily occur to the silicon interposer 11, thereby reducing the planarity of the surface of the silicon interposer 11. As such, when the semiconductor chip 15 is disposed on the interposer 11, cracking can easily occur to the solder bumps 150 or the conductive bumps 12, thus reducing the electrical connection reliability.
Further, two underfilling processes need to be performed for each of the silicon interposers 11 so as to form an underfill between the silicon interposer 11 and the packaging substrate 10 and form an underfill between the silicon interposer 11 and the semiconductor chip 15. Therefore, the process time is significantly increased, which does not facilitate mass production.
Furthermore, if the silicon interposer 11 has a small thickness such as 4 mil, when the underfill 14 is formed between the interposer 11 and the packaging substrate 10, the underfill 14 can easily creep up to contaminate the redistribution layer 111, thereby easily resulting in an electrical connection failure between the redistribution layer 111 and the semiconductor chip 15.
Therefore, there is a need to provide a semiconductor package and a fabrication method thereof so as to overcome the above-described drawbacks.